Phase - Locked Loops Demystified

Over the past decade, Phase-Locked Loops (PLLs) have become an integral part of the modern ASIC design. PLLs provide the clocks that sequence the operation of the various blocks on an ASIC chip as well as synthesize their communications. There are various types of PLLs targeting specific applications. Clock generator PLLs are capable of large frequency multiplication. They are primarily used to generate clocks for digital logic. Deskew PLLs are used to eliminate clock skew between two clock domains. They are often used in older synchronous chip-tochip IO applications. Spread spectrum PLLs slowly vary the clock frequency in order to spread a clock's electro-magnetic (EM) signature over a frequency band, thereby reducing the maximum emitted EM power at any frequency. Spread spectrum PLLs are used in many consumer products such as PCs, PDAs, etc. It is essential that PLLs be carefully specified, designed, and verified. A poorly designed or improperly used PLL can cause substantial delay in product launch or, in the worst case, total product failure.